I am a second year Masters candidate in the Computer Science
and Autoamtion Department
at Indian Institute of Science
I am associated with the Compiler lab under the supervision of Prof.Y N Srikant
I graduated from National Institute of Technology Karnataka (NITK), Surathkal previously known as
Karnataka Regional Engineering College (KREC) with a Bachelor of Engineering in Computer Engineering in May 2004.
My primary research interest lies in the field of power aware computing
(low power optimizations at the level of architecture and compiler)
although I am equally intersted in general computer architecture and
compiler issues. My recent research work focuses around developing an object
cache architecture which reduces the energy consumption of the memory
hierarchy in systems that typically execute complex run-time environments
for object oriented programs. Having evaluated the benefits of such an
architecture, my current focus is on using static anlysis of code and
profiling analysis for developing compiler optimizations which make use of
the object cache architecture to reduce energy consumption.
Shekhar S S, Y N Srikant: “Object Cache – An Energy Efficient Cache Architecture”.
Technical Report, Department of CSA, IISc, IISc-CSA-TR-2005-13, 2005.
Shekhar S S, Dipti Deodhare, Satwik V, Sangeeta Kumari: “AADARSHA -
A Flexible Decision Support System Shell Architecture”. Proceedings of
Indian International Conference on Artificial Intelligence (IICAI - 03), Hyderabad, December 2003: 1155-1164
Shekhar S S, Satwik V, Santhi Thilagam: “COMAC Model for Network Security on Linux”.
Proceedings of National Conference on Recent Trends in Networking Technologies, Coimbatore, December 2003.
E0 358 Topics in Power Aware Computing
E0 243 Computer Architecture
E3 260 Embedded Systems Design
E0 221 Discrete Structures