Department of Computer Science and Automation

Indian Institute of Science, Bangalore, India

Aravind Acharya N

Research

My research interests are broadly in the areas of compilers, program analysis, software verification and automata theory. I'm currently a PhD student with Dr. Uday Reddy. I am working on providing automated compiler technologies for high performance computing in multicore and manycore architectures, using the polyhedral framework.

My master's thesis work with Dr. K V Raghavan was on model-checking in counter automata. In this work, we provide a framework for model-checking CTL properties in a class of Presburger counter systems. The key novelty in this work was the use of existing reachability analysis tools as black-boxes.

Publications

Uday Bondhugula, Aravind Acharya and Albert Cohen. "The Pluto+ Algorithm: A Practical Approach for Parallelization and Locality Optimization of Affine Loop Nests". In ACM Transactions on Programming Languages and Systems (TOPLAS), Volume 38, Issue 3, April 2016.

Irshad Pananilath, Aravind Acharya, Vinay Vasista and Uday Bondhugula."An Optimizing Code Generator for a Class of Lattice-Boltzmann Computations". In the ACM Transactions on Architecture and Code Optimization, Feb 2015 (accepted), Volume 12, Issue 2, Article 14, July 2015.

Aravind Acharya and Uday Bondhugula."Pluto+: Near-Complete Modeling of Affine Transformations for Parallelism and Locality". ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), Feburary 2015, San Fransisco, USA.

K. Vasanta Lakshmi, Aravind Acharya and Raghavan Komondoor, "Checking Liveness Properties of Presburger Counter Systems using Reachability Analysis", Proc. 19th Int. Symp. on Formal Methods (FM), Singapore, May 2014.

Aravind Acharya, K Vasanta Laksmi and Raghavan Komondoor. "Checking Temporal Properties of Presburger Counter Systems using Reachability Analysis". Tech Report, December 2013.

Courses

Advanced Techniques in Compilation and Programming for Parallel Architectures
Compiler Design
Computer Architecture
Program Analysis and Verification (Teaching Assistant: Aug-Dec 2011, Aug-Dec 2015)
Automated Verification
Design and Analysis of Algorithms
Linear algebra

Education

I completed my MSc (Engg) from the department of Computer Science and Automation, Indian Institute of Science, Bengaluru, India in January 2014. I obtained my Bachelor of Engineering degree from Sri Jayachamarajendra college of Engineering, Mysore in the year 2010.

Co-curricular Activities

I enjoy playing tennis. Cycling and trekking occasionally. I do play chess and have represented the college team for three consecutive years during my B.E.

Contact

Room #116

Multicore Computing Lab

www.csa.iisc.ernet.in

aravind.acharya@csa.iisc.ernet.in